May 28-29 Technology Marketplace Sessions
- 1 Technology Marketplace Description
- 2 Runtime Systems Technology Marketplace
- 3 Compilers and Auto-tuning Technology Marketplace
- 4 Languages and DSLs Technology Marketplace
- 5 Mapping and Optimization Framework Technology Marketplace
- 6 Resilience Technology Marketplace
- 7 Simulation Technology Marketplace
- 8 Performance Tools Technology Marketplace
- 9 Emerging Memory Technology Marketplace
Technology Marketplace Description
The Technology Marketplace will be a place for peer-to-peer, at-the-laptop live demos and discussion of technologies being developed in the X-Stack portfolio and in coordinating programs.
A conference room will be set up with 15-20 tables, with two technologies per table. The demo giver will bring your laptop and work from that, or plan to log into your home systems (Wi-Fi and power provided). Browse an EMACS buffer to show compiler input and output, try new permutations suggested by your peers, show makefiles, time the wall clock, interact with visualizations. Show the places where the technology smokes the competition, and the unvarnished truth where your technology gives off smoke from stress. Plan for 4-5 people sitting with you looking over your shoulder, sharing ideas, asking questions, and innovating with you.
For accompanying materials, you can bring a small poster, or better yet, a printout of the concepts, schematics, and equations. Flipchart easels will be provided for you to sketch concepts live. We expect high participation of X-Stack performers, several technologies per team.
Technologies will be grouped by special interest sessions. The sessions are listed below with their organizers.
Organizers of the technology marketplace sessions should be contacting you to discuss your participation in their session. If you are not contacted by COB May 14, and would like to participate, please write to me, firstname.lastname@example.org.
Runtime Systems Technology Marketplace
Session Organizer: Vivek Sarkar, vsarkar@Rice.edu
Laxmikant (Sanjay) Kale: Charm++ RTS demos on resilience, and temperature-power-aware optimizations.
Compilers and Auto-tuning Technology Marketplace
Session Organizer: Mary Hall, email@example.com
Languages and DSLs Technology Marketplace
Session Organizers: Dan Quinlan, firstname.lastname@example.org and Saman Amarasinghe, email@example.com
Mapping and Optimization Framework Technology Marketplace
Session Organizer: Armando Solar-Lezama, firstname.lastname@example.org
- DSL example: X-GEN for Directive-Based Heterogeneous Computing, by Chunhua "Leo" Liao
Resilience Technology Marketplace
Session Organizers: Andrew A. Chien, email@example.com and Mattan Erez, firstname.lastname@example.org
- Data-oriented, User-controlled Resilience with Global View Resilience (Hajime Fujita, Nan Dun), includes OpenMC, Chombo, and ddcMD demonstrations
- DEGAS resilience technologies (Mattan Erez):
- Using Berkeley Lab's Checkpoint/Restart: Application Programming Interfaces and Operating System Interfaces (LBNL)
- Containment Domains for Scalable and Efficient Resilience (UT Austin)
- Affinity-Aware Checkpoint/Restart (NCST)
Simulation Technology Marketplace
Session Organizers: Shekhar Borkar, email@example.com and Wilfred Pinfold,firstname.lastname@example.org
Participants: Arun Rodrigues, Romain Cledat, Jeff Vetter
- OCR on FSIM
- SST's new GUI
- ExaSAT compiler/performance analysis tool
Performance Tools Technology Marketplace
Session Organizers: Martin Schulz, email@example.com
MemAxes - A new tool for memory performance visualization
Martin Schulz, LLNL
* Examples on XSBench and Lulesh
HPCToolkit and DOE codes
John Mellor-Crummey, Rice Unversity
* NWChem (global arrays) * madness (massive threading + templates) * lulesh (massive inlining) * open community runtime
Emerging Memory Technology Marketplace
Session Organizers: Jeffrey Vetter, firstname.lastname@example.org, and Xipeng Shen, email@example.com